Loss fraction at STC (DC circuit)

What it is

The resistive loss of the DC cables when the array runs at standard test conditions, as a fraction of the array power. With the default wiring model (I²R on the MPP current) the model turns it into a wiring resistance and applies the loss at the actual current of every timestep, so the annual loss is smaller than this fraction.

Typical values and how to get it

1.5 % is a usual design value. A cable schedule gives it exactly.

How it is applied

$$R_w = f_w\,\frac{V_{\text{mpp,STC}}}{I_{\text{mpp,STC}}}, \qquad P_{\text{loss}}(t) = R_w\, I(t)^2$$

where

Symbol	Meaning	Unit
$R_w$	the wiring resistance of one inverter's array	Ω
$f_w$	this input as a fraction	—
$V_{\text{mpp,STC}}$	the array's maximum-power voltage at standard test conditions	V
$I_{\text{mpp,STC}}$	the array's maximum-power current at standard test conditions	A
$P_{\text{loss}}(t)$	the wiring loss of the timestep	W
$I(t)$	the array current of the timestep	A

API

dc_losses.dc_wiring_loss_at_stc — sent as a fraction 0–1

Symbols follow the symbol registry.