Flat fraction

Method

The loss at every timestep is the design fraction times the array power after the flat derates (1). No fixed resistance is derived. For the operating-point search, each timestep uses the resistance that gives this loss at the maximum-power current (2).

The math

1. Wiring loss
2. Resistance of the operating-point search

$$L_i = f_w\,P_i \tag{1}$$ $$R_{w,i} = \frac{L_i}{I_{mpp,i}^2} \tag{2}$$

where

Symbol	Meaning	Unit
$L_i$	the wiring loss at timestep $i$	W
$f_w$	the design loss fraction	—
$P_i$	the array DC power after the flat derates at timestep $i$	W
$R_{w,i}$	the equivalent wiring resistance at timestep $i$	Ω
$I_{mpp,i}$	the array current at maximum power at timestep $i$	A

References

1. Dobos 2014, PVWatts Version 5 Manual, NREL/TP-6A20-62641

API

dc_losses.ohmic_model = flat

Symbols follow the symbol registry.