Model option
I²R on the MPP current
Resistance times the square of the array current
Inputs used: Loss fraction at STC (DC circuit), Global wiring resistance
Method
The design loss fraction at standard conditions is turned into a wiring resistance at the array's standard-condition operating point. At every timestep the loss is that resistance times the square of the array current at its maximum-power point, scaled by the current factor of the flat derates.
The math
where
| Symbol | Meaning | Unit |
|---|---|---|
| the wiring loss at timestep | W | |
| the DC wiring resistance | Ω | |
| the current factor of the flat derates: the square root of the product of the quality, light-induced degradation, light-soaking and mismatch factors | — | |
| the array current at maximum power at timestep | A | |
| the design loss fraction at standard conditions | — | |
| the array voltage and current at maximum power under standard conditions | V and A |
References
- Analysis of PVsyst 8.1.5 outputs shows this convention in its results.
API
dc_losses.ohmic_model = ohmic_i2r
Symbols follow the symbol registry.