Current–voltage split

Method

The flat derates act in two places. In the loss diagram each takes its fraction of the running DC total. The order is the module quality, the light-induced degradation, the light soaking of CIS and CIGS modules, then the mismatch. The module mismatch and the string mismatch add into one mismatch fraction (1). The product of the four factors scales the array's maximum power (2). The inverter reads the array's current-voltage curve when it runs away from the maximum-power point. On that curve each factor scales the current by half its change (3). A loss d gives 1 − d/2 and a gain g gives 1 + g/2. The voltage is scaled by the rest of the product (4, 5). The rear mismatch of a bifacial array acts on the curve the same way at each timestep, with d its share of the array power. The DC wiring loss is computed on the scaled current. The rule is fitted to PVsyst 8.1.5's hourly output. Ten PVsyst runs of one 4 MW central inverter agree within 0.06 % of annual grid energy. Eight of them have 24-module strings that run below the minimum MPP voltage on about 3,600 hours of the year. They cover string mismatch of 0.15 %, 1 %, 2 % and 4 %, module mismatch of 2 % and 4 %, a light-induced degradation of 1.5 % and a quality gain of 2 %.

The math

1. Mismatch fraction
2. Combined derate
3. Current factor
4. Voltage factor
5. Derated array curve

$$m_{tot} = m_{mod} + m_{str} \tag{1}$$ $$f_{dc} = (1 + g_q)(1 - \text{LID})(1 + g_{ls})(1 - m_{tot}) \tag{2}$$ $$a_I = \Big(1 + \frac{g_q}{2}\Big)\Big(1 - \frac{\text{LID}}{2}\Big)\Big(1 + \frac{g_{ls}}{2}\Big)\Big(1 - \frac{m_{tot}}{2}\Big) \tag{3}$$ $$b_V = \frac{f_{dc}}{a_I} \tag{4}$$ $$I_d(b_V\,V) = a_I\,I(V) \tag{5}$$

where

Symbol	Meaning	Unit
$m_{tot}$	the mismatch fraction	—
$m_{mod}$	the module mismatch loss fraction	—
$m_{str}$	the string mismatch loss fraction	—
$f_{dc}$	the combined DC derate	—
$g_q$	the module quality gain: the quality loss input with its sign reversed	—
$\text{LID}$	the light-induced degradation fraction	—
$g_{ls}$	the light-soaking gain fraction. 0 for modules other than CIS and CIGS	—
$a_I$	the current factor of the array curve	—
$b_V$	the voltage factor of the array curve	—
$I_d(V)$	the derated array current at voltage $V$	A
$I(V)$	the array current. At voltage $V$, before the flat derates	A

References

1. Analysis of PVsyst 8.1.5 outputs shows this convention in its results.

API

dc_losses.derate_model = pvsyst_8

Symbols follow the symbol registry.